在Xilinx Foundation 3. 1i下用JTAG PROGRAMER下载程序到芯片中, 可是总是出现如下错误：If the security flag is
turned on in the bitstream,programming
status can not be confirmed;others,programming terminated due to error.测量电路信号, 没有相应的波形, 显然下载没有成功. 所用的芯片是：Xilinx Spartan2
XC2S50TQ144. 怎么解决？
This is a security feature. By disabling readback, the configuration data cannot be read back from the FPGA. This prevents others from pirating your intellectual properties. You can enable or disable this feature during bitstream generation.
The proper way to determine if the configuration is finished without error is to check the status of the DONE pin on the FPGA. DONE pin should goes high if the bitstream is received correctly. Also, since you are using JTAG configuration, please make sure you have selected JTAG clock (not CClk) as your Startup clock during bitstream generation. （参考译文：这是保密功能. 通过禁用回读, 配置数据不能从FPGA回读. 这可以防止其他人盗用你的成果. 在生成位元流过程中, 可以启用或禁用这个功能.
确定配置是否准确无误地完成, 适合的方法就是检查FPGA上DONE引脚的状态. 如果正确地接收了位元流, 则DONE引脚将会升高. 而且, 既然使用JFAG配置, 就要确保在生成位元流过程中, 已经将JGAG时钟(而不是CClk)选作了Startup时钟. ）
